Apollo 150 Manual do Utilizador Página 128
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User Manual version 2207
APOLLO 120/150 III
7-118
u SDRAM/VCM CAS LATENCY
When synchronous DRAM is installed, the number of clock
cycles of CAS latency depends on the DRAM timing.
The Choice: 2, 3 or SPD
u SDRCLK CONTROL
This item controls the phase of SDRCLK that lags behind
SDCLK.
The choice: Enabled or Disabled.
u SDWCLK CONTROL CS#/CKE
This item controls the phase of SDWCLK used for chip set
select signals pin that lags ahead SDCLK.
The choice: Enabled or Disabled.
u SDWCLK CONTROL MA/SRAS
This item controls the phase of SDWCLK used for MA/ SRAS
signals that lags ahead SDCLK.
The choice: +5.0ns~-2.5ns (Default 0.0ns)
u SDWCLK CONTROL DQM/MD
This item controls the phase of SDWCLK used for DQM/MD
signals that lags ahead SDCLK.
The choice: +5.0ns~-2.5ns (Default 0.0ns)
u EGMRCLK CONTROL
This item controls the phase of EGMRCLK that lags behind
SDCLK.
The choice: -1.0ns~+6.5ns (Default 0.0ns)
u EGMWCLK CONTROL
This item controls the phase of EGMWCLK that lags ahead
SDCLK.
The choice: +5.0ns~-2.5ns (Default 0.0ns)
- Versatile 1
- Copyright Notice 2
- Trademarks 2
- Unpacking 3
- Warranty 3
- Important Safety Precautions 4
- 1. INTRODUCTION 11
- 1.1. General Information 12
- 1.3. Specifications 15
- 1.4. Dimensions 20
- 1.4.2. APOLLO 150 21
- 2. USING THE SYSTEM 23
- 2.1. Identifying the System 24
- 2.1.2. Side Views 25
- 2.1.3. I/O Outlets 26
- DC or 40~56VDC or 36~72VDC) 27
- 3.1. Versatile Stand 32
- 3.1.3. Fixed Standing 33
- 3.1.4. Cable Management 34
- IGURE 3-6 FIGURE 3-7 36
- 3.3. Panel Mounting 37
- 3.4. KIOSK Integration 38
- 4. I/O CONNECTION 39
- 4.1. Parallel Port 40
- 4.2. COM Ports x 4 41
- 2 3 4 5 6 7 43
- User Manual version 2007 45
- 4.5.1.1. Single Display Mode 45
- Resolution 47
- CRT1 LCD 48
- 4.6. PS/2 Keyboard Interface 55
- 4.7. PS/2 Mouse Interface 55
- 4.8. External FDD (DB-15) 56
- 4.9. +5V/12V DC-Out 57
- 4.10. VR Brightness Control 57
- IO 206H(WRITE) 58
- 4.13. USB Ports 60
- IGURE 5-1: APOLLO 120 63
- EXPLODED DIAGRAM 63
- APOLLO 150 ¥DÅé²Õ«~ 64
- 5.2. Installing the CPU 65
- 5.4. Motherboard Assembly 67
- HDD CABLE 220mm 69
- APOLLO 120 -±ªO²Õ«~ 71
- APOLLO 150 -±ªO²Õ«~ 71
- 5.8. LCD Module Assembly 72
- 15" LCD ²Õ«~ 73
- CDROM/FDD ²Õ«~ 77
- FDD cable 78
- 5.10. Power Module Assembly 79
- POWER ²Õ«~ 80
- APOLLO ÅK¥ó«á»\²Õ«~ 82
- 5.13. Stand Module Assembly 83
- °ò®y²Õ«~ 84
- ¥DÅé²Õ«~ 84
- APOLLO 120/150 ©³®y-×¹¢¤W»\ 84
- APOLLO 120/150 ©³®y-×¹¢¤U»\ 84
- 6.1. APOLLO III Motherboard 86
- 6.1.2. Specifications 87
- CN4: PCI/ISA Slot Side 101
- CC E3 INTC A3 SD6 102
- CC A5 SD4 102
- CC A7 SD2 102
- 6.2. APOLLO III I/O Board 104
- 7. AWARD BIOS SETUP 113
- 7.1. Award BIOS 114
- 7.2. Control Key Definition 115
- 7.3. Getting Help 116
- 7.4. AWARD BIOS Setup 116
- Standard CMOS Features 118
- RIMARY HDDS / SECONDARY HDDS 119
- RIVE A TYPE / DRIVE B TYPE 120
- ULL SCREEN FUNCTION 120
- Advanced BIOS Features 121
- IRUS WARNING 122
- NTERNAL CACHE/EXTERNAL CACHE 122
- ACHE ECC CHECKING 122
- ROCESSOR NUMBER FEATURE 122
- YPEMATIC RATE (CHARS/SEC) 124
- ECURITY OPTION 124
- ELECT FOR DRAM > 64MB 124
- EPORT NO FDD FOR WIN 95 124
- IDEO BIOS SHADOW 124
- Advanced Chipset Features 125
- UTO CONFIGURATION 126
- CTIVE TIME 126
- TO CAS DELAY 126
- RAM BACKGROUND COMMAND 126
- YSTEM BIOS CACHEABLE 129
- IDEO RAM CACHEABLE 129
- EMORY HOLE AT 15M-16M 129
- PERTURE SIZE 129
- RAPHIC WINDOW WR COMBIN 129
- ONCURRENT FUNCTION (MEM) 130
- ONCURRENT FUNCTION (PCI) 130
- IPELINE CONTROL 130
- ELAY TRANSACTION 130
- EMORY PARITY CHECK 130
- NCHIP IDE DEVICE 132
- NTERNAL PCI / IDE 132
- RIMARY MASTER/SLAVE ULTRADMA 132
- URST MODE 132
- Power Management Setup 135
- UNCTION 136
- USPEND TYPE 136
- IDEO OFF OPTION 136
- IDEO OFF METHOD 137
- WITCH FUNCTION 137
- FF AFTER 137
- OWER BUTTON OVER RIDE 137
- AKE UP EVENTS 138
- OWER ON PASSWORD 138
- OWER UP BY ALARM 138
- PnP PCI Configuration 139
- ESET CONFIGURATION DATA 140
- ESOURCE CONTROLLED BY 140
- ESOURCES 140
- ASSIGNED TO 140
- ALETTE SNOOP 140
- 7.4.8. PC Health Status 141
- Frequency Voltage Control 142
- UTO DETECT DIMM/PCI CLK 143
- PREAD SPECTRUM 143
- OST/DRAM/PCI CLOCK 143
- 7.4.12. User Password 146
- 7.4.13. Save and Exit Setup 147
- 7.4.14. Exit Without Saving 148
- 8.1. Ethernet Drivers 150
- 8.2. PC 610 AGP XGA 151
- 8.3. Audio Setup 152
- 8.4. Driver Installation 153
- User Manual version 2207 154
- APOLLO 120/150 III 154
- 9. TOUCHSCREEN 155
- 9.1.3. Installing TouchWare 159
- 9.2.1. System Requirements 164
- 9.2.2. About Elo Software 165
- 9.2.3. Installation 166
- Appendix 178
- HIGH LUMINANACE LCD 179
- PECIFICATION 179
- TEM SPECIFICATION 179
- DD 0 +3.6 180
- BL - 9.0 mArms 180
- B: DiskOnChip 181
- Installation 181
- C: Wake-On-LAN 183
- D: First MB Memory Map 186
- E: Power Supply 187
- MAX 188
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